Moduł oferowany także w ramach programów studiów:
Informacje ogólne:
Nazwa:
Digital Electronics and Programmable Devices
Tok studiów:
2017/2018
Kod:
IES-1-307-s
Wydział:
Informatyki, Elektroniki i Telekomunikacji
Poziom studiów:
Studia I stopnia
Specjalność:
-
Kierunek:
Electronics and Telecommunications
Semestr:
3
Profil kształcenia:
Ogólnoakademicki (A)
Język wykładowy:
Angielski
Forma i tryb studiów:
Stacjonarne
Osoba odpowiedzialna:
dr inż. Dąbrowska-Boruch Agnieszka (adabrow@agh.edu.pl)
Osoby prowadzące:
dr inż. Dąbrowska-Boruch Agnieszka (adabrow@agh.edu.pl)
dr hab. inż. Jamro Ernest (jamro@agh.edu.pl)
Wielgosz Maciej (wielgosz@agh.edu.pl)
Krótka charakterystyka modułu

The module transmits knowledge in the field of construction, operating principles and design of digital circuits.

Opis efektów kształcenia dla modułu zajęć
Kod EKM Student, który zaliczył moduł zajęć wie/umie/potrafi Powiązania z EKK Sposób weryfikacji efektów kształcenia (forma zaliczeń)
Wiedza
M_W001 Student has knowledge of describing and analyzing the operation of basic logical functions; knows the hardware platform and tools to design and simulate digital circuits ES1A_W16, ES1A_W01 Egzamin,
Kolokwium
M_W002 Student has the ordered knowledge of propagation of digital signal, operation principles of digital electronic components; analog to digital, digital to analog converters ES1A_W05, ES1A_W12 Egzamin,
Kolokwium
M_W003 Student knows and understands principles of operation of complex digital components such as, memory, programmable devices, basic arithmetic modules ES1A_W05, ES1A_W12 Egzamin,
Kolokwium
Umiejętności
M_U001 Student can design, implement and test his own digital module. ES1A_U22, ES1A_U12, ES1A_U16 Wykonanie ćwiczeń laboratoryjnych
M_U002 Student can use the well-known methods, logical models and computer simulations for analysis and evaluation of the performance of digital electronic circuits ES1A_U07 Wykonanie ćwiczeń laboratoryjnych
M_U003 Student can develop documentation on the engineering projects and prepares a texts containing an overview of the project results ES1A_U03 Wykonanie ćwiczeń laboratoryjnych
M_U004 Student can compare the design of basic digital electronic systems and considering usability, power, speed, cost ES1A_U09, ES1A_U15 Wykonanie ćwiczeń laboratoryjnych
Kompetencje społeczne
M_K001 Student is aware of the responsibility for their own work and willingness to comply with the principles of working in a team and bearing responsibility for cooperative tasks ES1A_K04 Zaangażowanie w pracę zespołu
Matryca efektów kształcenia w odniesieniu do form zajęć
Kod EKM Student, który zaliczył moduł zajęć wie/umie/potrafi Forma zajęć
Wykład
Ćwicz. aud
Ćwicz. lab
Ćw. proj.
Konw.
Zaj. sem.
Zaj. prakt
Zaj. terenowe
Zaj. warsztatowe
Inne
E-learning
Wiedza
M_W001 Student has knowledge of describing and analyzing the operation of basic logical functions; knows the hardware platform and tools to design and simulate digital circuits + + + - - - - - - - -
M_W002 Student has the ordered knowledge of propagation of digital signal, operation principles of digital electronic components; analog to digital, digital to analog converters + + + - - - - - - - -
M_W003 Student knows and understands principles of operation of complex digital components such as, memory, programmable devices, basic arithmetic modules + - + - - - - - - - -
Umiejętności
M_U001 Student can design, implement and test his own digital module. - + + - - - - - - - -
M_U002 Student can use the well-known methods, logical models and computer simulations for analysis and evaluation of the performance of digital electronic circuits - + + - - - - - - - -
M_U003 Student can develop documentation on the engineering projects and prepares a texts containing an overview of the project results - - + - - - - - - - -
M_U004 Student can compare the design of basic digital electronic systems and considering usability, power, speed, cost + - + - - - - - - - -
Kompetencje społeczne
M_K001 Student is aware of the responsibility for their own work and willingness to comply with the principles of working in a team and bearing responsibility for cooperative tasks - - + - - - - - - - -
Treść modułu zajęć (program wykładów i pozostałych zajęć)
Wykład:

This module is delivered as lectures, exercises, laboratory.

Lectures
1. Boolean Algebra
Boolean algebra (axioms, selected theorems and definitions), logical functions, the canonical form of Boolean expressions, basic arithmetic operations, codes

2. Combinational circuits, gates
Definition of combinational logic, gates (types, structure, technologies, parameters, characteristics, connection of gates constructed in different technologies). Logic simplifications methods: Karnaugh Map, Quina-McMcuskey’a; hazards, multiplexers and demultiplexers.

3. Sequential circuits
Sequential logic – definition, types and parameters. Flip-flops, counters, registers, analysis of sequential logic, Moor and Mealy Finite State Machine (FSM), minimization of FSM, synchronous and asynchronous FSM, race condition, implementation of basic FSMs in the hardware description language, shift-registers.

4. Memory
Memory – types, structures and concept of operation: ROM/RAM, SRAM/DRAM. Typical read/write cycles for synchronous and asynchronous memories. Dual port memory, Specialized memories: FIFO (First-In First-Out), LUT (Look-Up Table).

5. Analog to Digital and Digital to Analog Converters
Converters – parameters. Structures and principle of operation for common converters: binary weighted DAC, R-2R (C-2C) ladder DAC, resistor string DAC, Flash ADC, single- dual-slope ADC, SAR ADC, Pulse-Width Modulation DAC, sigma-delta.

6. Programmable Devices
Programmable Devices – structure and principle of operation, PAL / GAL/ FPGA. Implementation of combinational and sequential logic in FPGAs. Dedicated modules incorporated in FPGAs: LUT, dedicated adders and multipliers, different memory types.

7. Propagation of digital signals in transmission lines
A response of transmission line on step function. Elimination of the reflections by a proper termination of a transmission line in digital modules. LVDS standard. Propagation of clock signals.

Ćwiczenia audytoryjne:

Exercises:

1. Combinational circuit – Boolean algebra functions, the canonical form of Boolean functions, analysis of combinational circuits, minimization of Boolean functions, elimination of hazards in combinational circuits, designing of combinational and arithmetic circuits
2. Sequential circuits – flip-flop (timing, converting flip-flops), analysis and synthesis of basic sequential circuits (simple counter example), synthesis of Moore and Mealy FSM – minimization of FSM, the complete design of a sequential circuit
3. Test

Ćwiczenia laboratoryjne:

Laboratory

1. Gates and Flip-Flops
Measurement of a true table, excitation table basic gates and flip-flops. Measurement of static and dynamic parameters of gates and flip-flops

2. Introduction to Computer Design
Editing digital circuit schematic: add elements such as gates, flip-flops and others, connecting elements using single lines and buses. Editing a hierarchical schematics. The schematic simulation: editing stimulus, analyzing simulation results. Synthesis and implementation on specific hardware platform elected designs.

3. Combinational logic
Design, simulation and implementation in FPGA an arbitrary selected combination logic or arithmetic unit.

4. Counters and registers
Design, simulation and implementation in FPGA an arbitrary selected counter or register.

5. Finite State Machine (FSM)
Design, simulation and implementation in FPGA an arbitrary selected FSM.

6. Memory
Design, simulation and implementation in FPGA an arbitrary selected memory unit.

7. AD DA converters
The measurement of selected parameters of the DAC. Getting familiar with the principle of operation (timing waveforms) of PWM and Sigma-Delta converters.

Nakład pracy studenta (bilans punktów ECTS)
Forma aktywności studenta Obciążenie studenta
Sumaryczne obciążenie pracą studenta 149 godz
Punkty ECTS za moduł 5 ECTS
Udział w wykładach 42 godz
Samodzielne studiowanie tematyki zajęć 30 godz
Udział w ćwiczeniach laboratoryjnych 28 godz
Przygotowanie do zajęć 20 godz
Przygotowanie sprawozdania, pracy pisemnej, prezentacji, itp. 15 godz
Udział w ćwiczeniach audytoryjnych 14 godz
Pozostałe informacje
Sposób obliczania oceny końcowej:

In order to obtain a positive final evaluation a positive mark of laboratory, exercises and exam must be obtained.
The final mark is a weighted average of labaratory (40%), exercises (20%) and exam (40%).
The final mark OK is equal:
OK= [average[ (rounded up to the nearest half degree) – provided that student obtained all positive marks in the first term.
OK= [average] (rounded down to the nearest half degree) – provided that student obtained all positive marks in the second term.
OK= 3.0 – student obtained positive marks in the third term

Wymagania wstępne i dodatkowe:

Non

Zalecana literatura i pomoce naukowe:

www.fpga.agh.edu.pl/tc/en, www.wikipedia.org (English version) and other links given in the lectures.
A. K. Maini, Digital Electronics, Principle, Devices and Applications, Wiley, Indie, 2007
F. Vahid Digital Design, USA, Wiley 2007

Publikacje naukowe osób prowadzących zajęcia związane z tematyką modułu:

Architektury zaawansowanych układów arytmetycznych w sprzętowych systemach rekonfigurowalnych, Ernest JAMRO. — Kraków : Wydawnictwa AGH, 2013.

Implementation of a RANLUX based pseudo-random number generator in FPGA using VHDL and Impulse C, Agnieszka DĄBROWSKA-BORUCH, Grzegorz GANCARCZYK, Kazimierz WIATR, Computing and Informatics, Slovak Academy of Sciences. Institute of Informatics — 2013 vol. 32 no. 6, s. 1272–1292.

A custom co-processor for the discovery of low autocorrelation binary sequences, Paweł RUSSEK, Michał KARWATOWSKI, Ernest JAMRO, Kazimierz WIATR, Measurement, Automation, Monitoring, 2016 vol. 62 no. 5, s. 154–156.

Informacje dodatkowe:

During the lectures, the student is encouraged to actively participate by asking questions and participation in gamification (Kahoot application – www.kahoot.com or the application for Android and iOS systems).